| 摘要 |
An integrated circuit includes both LDMOS devices and one or more low-power CMOS devices that are concurrently formed on a substrate using a deep sub-micron VLSI fabrication process. The LDMOS polycrystalline silicon (polysilicon) gate structure is patterned using a two-mask etching process. The first etch mask is used to define a first edge of the gate structure located away from the deep body/drain implant. The second etch mask is then used to define a second edge of the gate structure, and the second etch mask is then retained on the gate structure during subsequent formation of the deep body/drain implant. After the deep implant, shallow implants and metallization are formed to complete the LDMOS device.
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