| 摘要 |
<p>A manufacturing method of a semiconductor device is provided to increase a DICD(Development Inspection Critical Dimension) contraction rate by inducing an active crosslinking combination process at an interface between a resist pattern and a RELACS(Resolution Enhancement Lithography Assisted by Chemical Shrink) layer in a baking process. A plurality of resist patterns(112) are formed on an upper surface of a semiconductor substrate(110). A crosslinking material layer(114) is formed on the upper surface of the semiconductor substrate including the resist patterns. An exposure process for the semiconductor substrate including the crosslinking material layer is performed to activate the acid in the inside of the resist patterns. A thermal process is performed to cause a crosslinking combination process at an interface between the crosslinking material layer and the resist patterns. The crosslinking material layer of the non-reacted state is removed in the thermal process.</p> |
