Structure of high performance combo chip and processing method

摘要

A method for fabricating a chip package is achieved. A seed layer is formed over a silicon wafer. A photoresist layer is formed on the seed layer, an opening in the photoresist layer exposing the seed layer. A first solder bump is formed on the seed layer exposed by the opening. The photoresist layer is removed. The seed layer not under the first solder bump is removed. A second solder bump on a chip is joined to the first solder bump.