| 摘要 |
PROBLEM TO BE SOLVED: To reduce the labor of a designer in verifying circuit descriptions subjected to pipeline synthesis. SOLUTION: A circuit verification description conversion device 100 is provided with a conversion part 102 for converting descriptions for operation level verification into descriptions for register transfer level verification for verifying register transfer level circuit descriptions; and an output part 103 for outputting the converted descriptions for register transfer level verification. The conversion part 102 is provided with an output signal verification description extraction means 102A for extracting descriptions for output signal verification from descriptions for operation level verification by using the variable name of an output signal; an input signal verification description extraction means for extracting descriptions for input signal verification from the descriptions for operation level verification by using the variable name of the input signal; and a conversion means 102C for converting the descriptions for operation level verification into the descriptions for register transfer level verification so that the descriptions for output signal verification can be operated in parallel with the descriptions for input signal verification. COPYRIGHT: (C)2009,JPO&INPIT
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