| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor tester favorable in timing accuracy by conducting a timing adjustment method preventing the off-capacitance of a semiconductor switch in a route or a timing adjustment error in a comparator itself used for timing adjustment from adversely affecting the timing accuracy of an adjusted driver. SOLUTION: In a pin electronic part of the semiconductor tester, a test signal is inputted from a driver via a semiconductor switch to a DUT while an output signal of the DUT is inputted via a semiconductor switch to a comparator. The electronic part is equipped with a timing reference driver and a timing reference comparator to input an output pulse of a driver with its timing to be adjusted and a pulse of reversed polarity from the reference driver into the reference comparator. The reference comparator is characterized by being used for comparing these superimposed waveforms with a prescribe DC voltage threshold, thereby performing timing adjustment. COPYRIGHT: (C)2009,JPO&INPIT
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