发明名称 RESET/SET FLIP-FLOP CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a reset/set flip-flop circuit capable of preventing skew that occurs in an output signal. SOLUTION: The reset/set flip-flop circuit includes: a switch 101 provided between a power supply 110 and an output terminal 310; a switch 102 provided between a ground 111 and the output terminal 310; a switch 103 provided between the power supply 110 and an output terminal 311; and a switch 104 provided between the ground 111 and the output terminal 311. When a signal input to the set input of a control circuit 200 is high level and a signal input to a reset input is low level, in the respective switches, the switches 101 and 104 are controlled into an on-state. When the signal input to the set input is low level and the signal input to the reset input is high level, the switches 102 and 103 are controlled into an on-state. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010278868(A) 申请公布日期 2010.12.09
申请号 JP20090130512 申请日期 2009.05.29
申请人 RENESAS ELECTRONICS CORP 发明人 ENOMOTO MASARU;HONMA KATSUMI
分类号 H03K3/356;H03K3/037 主分类号 H03K3/356
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