发明名称 INTEGRATED PACKAGE
摘要 A device substrate has a device major surface, a semiconductor element on the device major surface, and electrically conductive device connectors extending across the device major surface. An interconnection substrate has an interconnection substrate having an interconnection major surface, the interconnection substrate defining at least one sealing recess recessed from the interconnection major surface, the sealing recess being surrounded by a sealing ring. The device substrate is mounted on the interconnection substrate with the interconnection major surface facing the device major surface, the sealing ring around the semiconductor element and with the device major surface sealed against the sealing ring so that the recess forms a sealed cavity containing the semiconductor element. Electrical interconnects extend across the interconnection major surface. Interconnection bumps are provided outside the sealing ring to electrically connect the device to the interconnect substrate.
申请公布号 US2010308450(A1) 申请公布日期 2010.12.09
申请号 US20100702041 申请日期 2010.02.08
申请人 IPDIA 发明人 VERJUS FABRICE;YAN-NOU JEAN-MARC;CHEVRIE DAVID;LECORNEC FRANCOIS;VAN VEEN NICOLAAS J.A.
分类号 H01L23/538;H01L21/60;H01L23/488 主分类号 H01L23/538
代理机构 代理人
主权项
地址