| 摘要 |
PROBLEM TO BE SOLVED: To improve conversion resolution without increasing a conversion cycle of a DA conversion circuit, and also suppress complication of a circuit configuration. SOLUTION: A PWM circuit 11 generates a pulse width modulation pulse P(A) to which pulse width modulation is performed on the basis of an X for a higher order N (N is a positive integer) bit of a digital input value Din. A superposition part 20 disperses a unit pulse U for 1 clock corresponding to a Z for a lower order m (m is a positive integer) bit of the digital input value Din for a final 1 clock of a conversion cycle T corresponding to the upper order N bit of the digital input value Din. COPYRIGHT: (C)2011,JPO&INPIT
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