发明名称 Level shifter with reduced power consumption and low propagation delay
摘要 A level shifter includes a Not gate coupled to a signal input and operable between a first high level and a low level; a first PMOS transistor coupled to a second voltage source and a control end; a first NMOS transistor coupled to the first PMOS transistor, a Not-gate output end and a reference voltage; and a control circuit coupled to the signal input, the Not-gate output end and the second voltage source. When the signal input and the Not-gate output end are at the first high level and the low level, respectively, the first PMOS transistor is turned on so that the signal output is at a second high level; and when the signal input and the Not-gate output end are switched contrarily, the first PMOS transistor is turned off and the signal output is at the low level.
申请公布号 US7847611(B2) 申请公布日期 2010.12.07
申请号 US20090357179 申请日期 2009.01.21
申请人 FARADAY TECHNOLOGY CORP. 发明人 YANG CHIH-WEN;CHEN SHENG-HUA
分类号 H03L5/00 主分类号 H03L5/00
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