发明名称 Memory control circuit, nonvolatile storage apparatus, and memory control method
摘要 An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.
申请公布号 US7849382(B2) 申请公布日期 2010.12.07
申请号 US20050568564 申请日期 2005.05.12
申请人 PANASONIC CORPORATION 发明人 KASAHARA TETSUSHI;IZUMI TOMOAKI;NAKANISHI MASAHIRO;TAMURA KAZUAKI;MATSUNO KIMINORI;INAGAKI YOSHIHISA;INOUE MANABU
分类号 G11C29/00;G06F12/16 主分类号 G11C29/00
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