| 摘要 |
A data processing apparatus is provided comprising processing circuitry and instruction decoding circuitry. The data processing apparatus is capable of operating at a plurality of different privilege. Processing circuitry of the data processing apparatus imposes on program instructions different access permissions to at least one of a memory and a set of registers at different ones of the different privilege levels. A debug privilege-level switching instruction is provided and decoding circuitry is responsive to this instruction to switch the processing circuitry from a current privilege level to a target privilege level if the processing circuitry is in a debug mode. However, if the processing circuitry is in a non-debug mode the instruction decoding circuitry prevents execution of the privilege-level switching instruction regardless of the current privilege level. |
