发明名称 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device and a manufacturing method thereof capable of suppressing a Vth variation of a P-channel MOS (PchMOS)-type transistor even after an annealing step of a ferroelectric substance which is a capacitive insulating film. <P>SOLUTION: The semiconductor memory device comprises: a PchMOS-type transistor 4 which is formed on a semiconductor substrate 1 and includes a gate electrode into which a P-type impurity is introduced; a first hydrogen barrier film 8 formed on the semiconductor substrate 1 so as to cover the upper part of the PchMOS-type transistor 4; a ferroelectric capacitor 7 which is formed on the first hydrogen barrier film 8 and uses the ferroelectric substance as the capacitive insulating film; and a second hydrogen barrier film 14 which covers the upper part and side of the ferroelectric capacitor 7 and is connected to the first hydrogen barrier film 8 in the peripheral part of the ferroelectric capacitor 7. The first hydrogen barrier film 8 includes a silicon element, a hydrogen element, and a third element which is less likely to desorb the hydrogen element than the silicon element. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012059766(A) 申请公布日期 2012.03.22
申请号 JP20100199011 申请日期 2010.09.06
申请人 PANASONIC CORP 发明人 TATSUNARI TOSHITAKA
分类号 H01L27/105;H01L21/8246;H01L27/10 主分类号 H01L27/105
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