发明名称 Decoding device and method
摘要 A decoding device and method for decoding an LDPC code with high accuracy while suppressing an increase of the scale of a device. A check node calculator (181) performs check node calculations including calculations of a nonlinear function &phgr;(x) and its inverse function &phgr;−1(x) of the nonlinear function so as to decode an LDPC code. A variable node calculator (103) performs variable node calculation of a variable node so as to decode the LDPC code. The check node calculator (181) has an LUT which receives a fixed-point quantized value expressing a numerical value with a fixed quantization width and outputs the result of the calculation of the nonlinear function &phgr;(x) as a semi-floating point quantized value which is a bit sequence expressing a numerical value with a quantization width determined by a part of a bit sequence and an LUT which receives a semi-floating point quantized value and outputs the result of the calculation of the inverse function &phgr;−1(x) as a fixed point quantized value. The invention can be applied to e.g., a tuner for receiving a satellite broadcast.
申请公布号 US8166363(B2) 申请公布日期 2012.04.24
申请号 US20060066641 申请日期 2006.09.07
申请人 SHINYA OSAMU;YOKOKAWA TAKASHI;SHINOHARA YUJI;MIYAUCHI TOSHIYUKI;SONY CORPORATION 发明人 SHINYA OSAMU;YOKOKAWA TAKASHI;SHINOHARA YUJI;MIYAUCHI TOSHIYUKI
分类号 H03M13/00 主分类号 H03M13/00
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