| 发明名称 |
METHOD AND SYSTEM FOR PERFORMING DMA IN A MULTI-CORE SYSTEM-ON-CHIP USING DEADLINE-BASED SCHEDULING |
| 摘要 |
A direct memory access (DMA) engine schedules data transfer requests of a data processing system according to both an assigned transfer priority and the deadline for completing a transfer. |
| 申请公布号 |
US2014019664(A1) |
申请公布日期 |
2014.01.16 |
| 申请号 |
US201314027654 |
申请日期 |
2013.09.16 |
| 申请人 |
CRADLE IP, LLC |
发明人 |
SIMON MOSHE B.;MACHNICKI ERIK P.;HARRISON DAVID A. |
| 分类号 |
G06F13/28 |
主分类号 |
G06F13/28 |
| 代理机构 |
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| 主权项 |
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