发明名称 STRESS ENHANCED MOS TRANSISTOR AND METHODS FOR ITS FABRICATION
摘要 A stress enhanced MOS transistor and methods for its fabrication are provided. In one embodiment the method comprises forming a gate electrode overlying and defining a channel region in a monocrystalline semiconductor substrate. A trench having a side surface facing the channel region is etched into the monocrystalline semiconductor substrate adjacent the channel region. The trench is filled with a second monocrystalline semiconductor material having a first concentration of a substitutional atom and with a third monocrystalline semiconductor material having a second concentration of the substitutional atom. The second monocrystalline semiconductor material is epitaxially grown to have a wall thickness along the side surface sufficient to exert a greater stress on the channel region than the stress that would be exerted by a monocrystalline semiconductor material having the second concentration if the trench was filled by the third monocrystalline material alone.
申请公布号 KR101386711(B1) 申请公布日期 2014.04.18
申请号 KR20097012880 申请日期 2007.11.16
申请人 发明人
分类号 H01L21/336;H01L29/04 主分类号 H01L21/336
代理机构 代理人
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