发明名称 |
TRANSMITTING CIRCUIT, COMMUNICATION SYSTEM, AND COMMUNICATION METHOD |
摘要 |
A transmitting circuit includes: a multiplexer configured to output a third digital signal obtained by alternately synthesizing a first digital signal of a predetermined cycle length and a predetermined data rate with a second digital signal of the predetermined cycle length and the predetermined data rate; a first selector configured to output the first digital signal in a first state and output the third digital signal in a second state that is different from the first state; a second selector configured to output the second digital signal in the first state and output the third digital signal in the second state; a first driver circuit configured to output a signal corresponding to a signal output from the first selector; and a second driver circuit configured to output a signal corresponding to a signal output from the second selector. |
申请公布号 |
US2015029876(A1) |
申请公布日期 |
2015.01.29 |
申请号 |
US201414318392 |
申请日期 |
2014.06.27 |
申请人 |
Fujitsu Limited |
发明人 |
OGATA Yuuki;KOYANAGI Yoichi |
分类号 |
H04J1/06;H04L1/00 |
主分类号 |
H04J1/06 |
代理机构 |
|
代理人 |
|
主权项 |
1. A transmitting circuit comprising:
a multiplexer configured to output a third digital signal obtained by alternately synthesizing a first digital signal of a predetermined cycle length and a predetermined data rate with a second digital signal, shifted by a half of the predetermined cycle length from the first digital signal, of the predetermined cycle length and the predetermined data rate so as to ensure that a data rate of the third digital signal is twice as high as the data rate of the first digital signal; a first selector configured to output the first digital signal in a first state and output the third digital signal in a second state that is different from the first state; a second selector configured to output the second digital signal in the first state and output the third digital signal in the second state; a first driver circuit configured to output a signal corresponding to a signal output from the first selector; and a second driver circuit coupled to the first driver through outputs of the first and second driver circuits and configured to output a signal corresponding to a signal output from the second selector. |
地址 |
Kawasaki-shi JP |