发明名称 PLL DEVICE
摘要 A PLL device includes a variable frequency oscillator and a frequency divider section. The variable frequency oscillator varies an oscillation frequency in response to a control signal including information on a phase difference between a reference signal and a frequency division signal and oscillates an output signal obtained by multiplying a frequency of the reference signal. The frequency divider section frequency-divides the output signal to generate the frequency division signal. An injection locked frequency divider is arranged in the frequency divider section, the control signal is input to the injection locked frequency divider, and the operation frequency of the injection locked frequency divider is controlled by the control signal.
申请公布号 US2015028957(A1) 申请公布日期 2015.01.29
申请号 US201414322531 申请日期 2014.07.02
申请人 FUJITSU LIMITED 发明人 Suzuki Toshihide;Matsumura Hiroshi
分类号 H03L7/18;H03L7/099 主分类号 H03L7/18
代理机构 代理人
主权项 1. A PLL device comprising: a variable frequency oscillator configured to vary an oscillation frequency in response to a control signal including information on a phase difference between a reference signal and a frequency division signal and oscillate an output signal obtained by multiplying a frequency of the reference signal; and a frequency divider section configured to frequency-divide the output signal to generate the frequency division signal, wherein an injection locked frequency divider is arranged in the frequency divider section, the control signal is input to the injection locked frequency divider, and an operation frequency of the injection locked frequency divider is controlled by the control signal.
地址 Kawasaki-shi JP