| 发明名称 | Electrostatic discharge protection apparatus | ||
| 摘要 | A semiconductor ESD protection apparatus comprises a substrate; a first doped well disposed in the substrate and having a first conductivity; a first doped area having the first conductivity disposed in the first doped well; a second doped area having a second conductivity disposed in the first doped well; and an epitaxial layer disposed in the substrate, wherein the epitaxial layer has a third doped area with the first conductivity and a fourth doped area with the second conductivity separated from each other. Whereby a first bipolar junction transistor (BJT) equivalent circuit is formed between the first doped area, the first doped well and the third doped area; a second BJT equivalent circuit is formed between the second doped area, the first doped well and the fourth doped area; and the first BJT equivalent circuit and the second BJT equivalent circuit have different majority carriers. | ||
| 申请公布号 | US8963202(B2) | 申请公布日期 | 2015.02.24 |
| 申请号 | US201213369455 | 申请日期 | 2012.02.09 |
| 申请人 | United Microelectronics Corporation | 发明人 | Wang Chang-Tzu;Tang Tien-Hao;Su Kuan-Cheng |
| 分类号 | H01L23/62;H01L27/02;H01L29/74 | 主分类号 | H01L23/62 |
| 代理机构 | WPAT, PC | 代理人 | WPAT, PC ;King Justin |
| 主权项 | 1. A semiconductor electrostatic discharge (ESD) protection apparatus comprising: a substrate; a first doped well, disposed in the substrate and having a first conductivity; a first doped area, having the first conductivity and disposed in the first doped well; a second doped area, having a second conductivity and disposed in the first doped well; an epitaxial layer, disposed in the substrate and having a third doped area with the first conductivity and a fourth doped area with the second conductivity, wherein the third doped area and the fourth doped area are disposed in the first doped well and separated by a first isolating area having the second conductivity; a first bipolar junction transistor (BJT) equivalent circuit formed between the first doped area, the first doped well, the first isolating area and the third doped area; and a second BJT equivalent circuit formed between the second doped area, the first doped well and the first isolating area and the fourth doped area; wherein the first BJT equivalent circuit and the second BJT equivalent circuit have different majority carriers. | ||
| 地址 | Hsinchu TW | ||