发明名称 SERIAL DATA TRANSMITTER CIRCUIT AND RECEIVER CIRCUIT, TRANSMISSION SYSTEM USING THE SAME, ELECTRONIC EQUIPMENT, AND SERIAL DATA TRANSMISSION METHOD
摘要 PROBLEM TO BE SOLVED: To establish a synchronous state between transmission and reception in a short time to resume descramble, even in the event of a transmission error.SOLUTION: A transmitter circuit 20 transmits serial data having a clock signal superposed thereon. An encoder 204 performs scramble processing on parallel data including information to be transmitted, generates a D symbol having the clock signal buried through coding by a predetermined method, and alternately allocates and outputs a predetermined number of continuous D symbols and K symbols which are synchronous control codes related to the scramble processing. A parallel-serial converter 206 converts the D symbols and the K symbols output from the encoder 204 into serial data. A plurality of K symbols included in one period of the scramble processing include first codes, second codes and third codes. The first codes indicate the start of scramble periods. The second codes are allocated at equivalent intervals to the remainder other than the first codes. The third codes are allocated to the remainder other than the first and second codes.
申请公布号 JP2015144392(A) 申请公布日期 2015.08.06
申请号 JP20140017404 申请日期 2014.01.31
申请人 ROHM CO LTD 发明人 SAITO SHINICHI
分类号 H04L7/08;H04L7/00 主分类号 H04L7/08
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