| 摘要 |
<p>A 1PPS signal reception unit (101) receives a 1PPS signal. An operation clock generation unit (102) generates an operation clock. A clock deviation measurement unit (103) measures a clock deviation that is a frequency deviation of the operation clock relative to the 1PPS signal. A counter (105) starts a count in accordance with the clock period of the operation clock when the 1PPS signal is inputted. The counter (105) completes one round of count when the count reaches a predetermined count completion value. Thereafter, the counter (105) starts another round of count. A sampling signal generation unit (106) outputs a sampling signal each time the counter (105) completes one round of count. A correction value calculation unit (110) and a change timing calculation unit (111) change, on the basis of the clock deviation, the count completion value of any round, thereby adjusting the output timing of the sampling signal.</p> |
