发明名称 Output circuit, data driver and display device
摘要 A display driver circuit includes an input terminal configured to receive an input signal, an output terminal configured to output an output signal, a slew rate control circuit configured to input the input signal and the output signal, and output a pair of differential input signals based on a voltage difference between the input signal and the output signal; a differential input circuit configured to input the pair of the differential input signals and output a pair of differential output signals, wherein the differential input circuit includes a first current mirror circuit and a second current mirror circuit, and an output circuit configured to input the pair of the differential output signals and output the output signal to the output terminal.
申请公布号 US9147361(B2) 申请公布日期 2015.09.29
申请号 US201414577969 申请日期 2014.12.19
申请人 RENESAS ELECTRONICS CORPORATION 发明人 Tsuchi Hiroshi
分类号 G09G5/00;G09G3/32;H03F3/30;H03F3/45;G09G3/36 主分类号 G09G5/00
代理机构 McGinn IP Law Group, PLLC 代理人 McGinn IP Law Group, PLLC
主权项 1. A display driver circuit comprising: an input terminal configured to receive an input signal; an output terminal configured to output an output signal; a slew rate control circuit configured to input the input signal and the output signal, and output a pair of differential input signals based on a voltage difference between the input signal and the output signal; a differential input circuit configured to input the pair of the differential input signals and output a pair of differential output signals, wherein the differential input circuit comprises a first current mirror circuit and a second current mirror circuit; and an output circuit configured to input the pair of the differential output signals and output the output signal to the output terminal, wherein the slew rate control circuit comprises: a charge-boosting circuit configured to supply a current to the first current mirror circuit if the voltage of the input signal is greater than the voltage of the output signal; anda discharge-boosting circuit configured to supply a current to the second current mirror circuit if the voltage of the input signal is less than the voltage of the output signal.
地址 Kawasaki-Shi, Kanagawa JP