| 摘要 |
A voltage regulator including an over-drive circuit and a control circuit is illustrated. The over-drive circuit receives a first voltage signal output from a sensing amplifier in a DRAM circuit, and regulates the first voltage signal according to an over-drive signal. The a control circuit electrically connected to the over-drive circuit receives a sense signal, and outputs the over-drive signal according to the sense signal, wherein the sense signal is asserted when a bit line in the DRAM circuit is sensed that an restoring and operation is performed. The over-drive signal goes down to a level of a second voltage signal from a current level thereof dependent on an external power merely when the sense signal is asserted but has not been asserted for a delay time, or otherwise, the over-drive signal is equal to the external power. |
| 主权项 |
1. A voltage regulator, comprising:
an over-drive circuit, for receiving a first voltage signal output from a sensing amplifier in a DRAM circuit, and regulating the first voltage signal according to an over-drive signal; and a control circuit, electrically connected to the over-drive circuit, for receiving a sense signal, and outputting the over-drive signal according to the sense signal, wherein the sense signal is asserted when a bit line in the DRAM circuit is sensed that an restoring operation is performed; wherein the over-drive signal goes down to a level of a second voltage signal from a current level thereof dependent on an external power merely when the sense signal is asserted but has not been asserted for a delay time, or otherwise, the over-drive signal is equal to the external power; wherein the over-drive circuit comprising: a voltage divider, for outputting a divided voltage signal according to the first voltage signal; a comparator, for comparing the divided voltage signal and a reference voltage signal to output a comparison signal; a first PMOS transistor, a gate thereof receives the comparison signal, a source thereof is electrically connected to the external power, and a drain thereof is electrically connected to the first voltage signal; and a second PMOS transistor, a gate thereof receives the over-drive signal, a source thereof is electrically connected to the external power, and a drain thereof is electrically connected to the first voltage signal. |
