发明名称 パッケージ回路、及び集積回路をパッケージングする方法
摘要 A packaged circuit and method for packaging an integrated circuit are disclosed. The packaged circuit has a lead frame, an integrated circuit chip, and an encapsulating layer. The lead frame has first and second sections, the first section including a lateral portion, a chip mounting area and a first extension. The integrated circuit chip is mounted in the chip mounting area and is in thermal contact with the chip mounting area. The encapsulating layer has top, bottom, and first and second side surfaces. The first extension is bent to provide a first heat path from the chip mounting area to the bottom surface. The heat path connects the heat chip mounting area to the bottom surface without passing through the first and second side surfaces and provides a heat path that has less thermal resistance than the heat path through either the lateral portion or the second section.
申请公布号 JP5782618(B2) 申请公布日期 2015.09.24
申请号 JP20130252771 申请日期 2013.12.06
申请人 インテレクチュアル ディスカバリー カンパニー リミテッド 发明人 キー・イェン・ング;フイ・ペン・コアイ;チアウ・ジン・リー;ケーン・レン・タン;ウェイ・リアン・ロー;キート・チュアン・ング;ノーフィダサル・エイザー・アブドゥル・カリム
分类号 H01L33/64;H01L23/02;H01L23/08;H01L23/36;H01L33/62 主分类号 H01L33/64
代理机构 代理人
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