发明名称 VCO restart up circuit and method thereof
摘要 A circuit and a method for restarting up a VCO of a PLL are introduced herein. The VCO restart up circuit receives a power down signal, an external signal, a clock output from the VCO and generates a trigger signal to the VCO to trigger the VCO clock to leave a stable mode. In other words, if the VCO clock is in the stable mode, the VCO restart up circuit generates one or more than one pulse on a trigger signal to restart up the VCO. Oppositely, if the VCO is not in the stable mode, there is no pulse on the trigger signal generated by the VCO restart up circuit and the VCO needs not to be restarted up.
申请公布号 US9143143(B2) 申请公布日期 2015.09.22
申请号 US201414153919 申请日期 2014.01.13
申请人 United Microelectronics Corp. 发明人 Chen Po-Hua;Liow Yu-Yee;Hsu Wen-Hong;Cheng Hsueh-Chen
分类号 H03L7/00;H03L7/183;H03L7/095;H03L7/093 主分类号 H03L7/00
代理机构 J.C. Patents 代理人 J.C. Patents
主权项 1. A circuit, for restarting up a voltage-controlled oscillator (VCO), the circuit comprising: a detection circuit, generating a detection signal by receiving an output signal from the VCO, a power down signal and an external signal; a divider, generating a reference signal by dividing the external signal; a logic circuit, generating a restart up signal by logic operation on the detection signal and the reference signal; and a pulse generator, generating a trigger signal according to the restart up signal, wherein the trigger signal is provided to the VCO for triggering the VCO to leave a stable mode.
地址 Hsinchu TW