发明名称 Method for power estimation for virtual prototyping models for semiconductors
摘要 The present invention may comprise an apparatus and method for calculating power consumption, including a unit for generating a clock-level analysis without synthesis of an algorithm description and calculating operating ratios of storage elements and arithmetic units. The invention may also comprise a method for estimating the power to be consumed by a SystemC model. By estimating this value, a user may gauge the amount of power a specific semiconductor design might consume, once manufactured into a chip.
申请公布号 US9141736(B2) 申请公布日期 2015.09.22
申请号 US201314016206 申请日期 2013.09.02
申请人 发明人 Huilgol Ninad
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Zilka-Kotab, PC 代理人 Zilka-Kotab, PC
主权项 1. A method for measuring power using a virtual prototype block, comprising: receiving the virtual prototype block representing an integrated circuit, wherein the virtual prototype block is a transaction level model of the integrated circuit and is generated without synthesizing the integrated circuit; associating a power estimation block with the virtual prototype block, the power estimation block configured to determine a power state of the virtual prototype block; storing, in a memory, information specific to the virtual prototype block including a real clock signal, a supply voltage, an expected number of gates, a per-gate leakage power, and a loading capacitance; simulating, by a processor executing a circuit simulation tool, the virtual prototype block; and generating, during the simulation of the virtual prototype block, an estimate of power consumed by the integrated circuit by inputting the stored information to the power estimation block.
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