Hardware acceleration of DSP error recovery for flash memory

摘要

A method for correcting a cell voltage driftage in a NAND flash device is disclosed. An indicator indicating a cell voltage driftage in a memory unit of a NAND flash device is monitored by a processor. A cell voltage driftage in the NAND flash device is detected based at least in part on the indicator. One or more NAND commands correcting the cell voltage driftage are generated. The one or more NAND commands include a NAND command associated with changing a configuration setting of the NAND flash device.

主权项

1. A method for correcting a cell voltage driftage in a NAND flash device, comprising:
using a cell voltage driftage detector to monitor an indicator indicating a cell voltage driftage in a memory unit of a NAND flash device, wherein monitoring the indicator includes monitoring intermediate results of an error-correcting code (ECC) decoder decoding data stored in the memory unit of the NAND flash device, wherein the ECC decoder comprises a low-density parity-check (LDPC) decoder, and wherein monitoring the intermediate results of the LDPC decoder comprises monitoring a number of LDPC iterations of the LDPC decoder; using the cell voltage driftage detector to detect a cell voltage driftage in the NAND flash device based at least in part on the indicator, comprising detecting a cell voltage driftage in the NAND flash device in response to detecting the number of LDPC iterations is greater than a predetermined threshold for the number of LDPC iterations; and in response to detecting the cell voltage driftage, generating one or more NAND commands correcting the cell voltage driftage, including by generating a NAND command associated with changing a configuration setting of the NAND flash device.