发明名称 APPARATUS AND METHODS FOR INPUT BIAS CURRENT REDUCTION
摘要 An apparatus and method for reducing input bias current of electronic circuits are provided in the present invention. In certain embodiments, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.
申请公布号 KR20150105230(A) 申请公布日期 2015.09.16
申请号 KR20150030597 申请日期 2015.03.04
申请人 ANALOG DEVICES, INC. 发明人 KUSUDA YOSHINORI
分类号 G05F3/20;G05F3/26 主分类号 G05F3/20
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