发明名称 Graphics processing
摘要 A graphics processing pipeline comprises a tessellation stage that is configured to tessellate a patch into tessellation primitives. When tessellating the patch, the tessellation stage generates tessellation vertex coordinate pairs that define within a parameter space the locations of vertices of the tessellation primitives for the patch. The tessellation vertex coordinate pairs are initially represented using a first binary representation and are then encoded into a more convenient second binary representation, but without any loss of resolution in the data. The step of encoding comprises mapping at least one of the tessellation vertex coordinate pairs to a mapped coordinate pair that can be represented using the second binary representation, wherein the mapped coordinate pair defines a location within an area of the parameter space that would otherwise be unused, invalid and/or unreachable for the vertices of the tessellation primitives for the patch.
申请公布号 GB201513663(D0) 申请公布日期 2015.09.16
申请号 GB20150013663 申请日期 2015.08.03
申请人 ARM LIMITED 发明人
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