发明名称 |
Data error susceptible bit identification |
摘要 |
As consistent with one or more embodiments, electronic circuitry is characterized to provide an indication of susceptibility of the circuitry to error. As consistent with one or more embodiments, bits corresponding to a circuit component of a circuit design are evaluated using a software program that characterizes a hardware description language representing the circuit components and their interconnectivity. A noise power value is calculated for each bit, and bits are identified as being susceptible to data error based upon the noise power value and a signal-to-noise (SNR) ratio reference value. A characterization of the circuit components (e.g., a quality factor) is provided based upon a number of bits susceptible to data errors. |
申请公布号 |
US9135385(B2) |
申请公布日期 |
2015.09.15 |
申请号 |
US201314089143 |
申请日期 |
2013.11.25 |
申请人 |
NXP B.V. |
发明人 |
Pandey Sujan;Deb Abhijit Kumar;Vermeulen Hubertus Gerardus Hendrikus |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
1. A computer implemented method comprising:
characterizing a hardware description language that represents circuit components and their interconnectivity; and by a computer, characterizing the circuit components by:
setting a signal-to-noise ratio (SNR) reference value that is based upon a predefined bit error rate; andfor bits in a word, in which each bit corresponds to one of the circuit components,
determining a noise power value for the bit,identifying the bit as being susceptible to data errors based upon the noise power value and the SNR reference value, andfor each bit identified as being susceptible to data errors, incrementing a value indicative of a total number of bits susceptible to data errors and outputting from the computer, data indicative thereof. |
地址 |
Eindhoven NL |