DEEP TRENCH ISOLATION STRUCTURE LAYOUT AND METHOD THEREOF

摘要

The embodiments described herein provide a semiconductor device layout and method that can be utilized in a wide variety of semiconductor devices. In one embodiment a semiconductor device is provided that includes a plurality of deep trench isolation structures that define and surround a first plurality of first trench-isolated regions in the substrate, and further define a second plurality of second trench-isolated regions in the substrate. The first plurality of first trench-isolated regions is arranged in a plurality of first columns, with each of the first columns including at least two of the first plurality of first trench-isolated regions. Likewise, the plurality of first columns are interleaved with the second trench-isolated regions to alternate in an array such that a second trench-isolated region is between consecutive first columns in the array and such that at least two first trench-isolated regions are between consecutive second trench-isolated regions in the array.

主权项

1. A semiconductor device comprising:
a semiconductor substrate; and a plurality of deep trench isolation structures formed in the semiconductor substrate, the plurality of deep trench isolation structures defining and surrounding a first plurality of first trench-isolated regions in the substrate and a second plurality of second trench-isolated regions in the substrate, wherein
each of the first plurality of first trench-isolated regions have a first dimension along a first direction and each of the second plurality of second trench-isolated regions have a corresponding second dimension along the first direction, and where the second dimension is at least twice the first dimension,the first plurality of first trench-isolated regions are arranged in a plurality of first columns, with each of the first columns including at least two of the first plurality of first trench-isolated regions arranged along the first direction, andthe plurality of first columns are interleaved with the second trench-isolated regions to alternate in an array such that at least one second trench-isolated region is between consecutive first columns in the array.