发明名称 ANALOG-TO-DIGITAL CONVERSION CIRCUIT
摘要 An analog-to-digital conversion circuit includes capacitors coupled to a common line. Each capacitor has a capacitance less than or equal to a capacitance sum of lower order capacitors. Switches selectively supply an analog input signal, a first reference voltage, or a second reference voltage to the capacitors in response to a control signal. A reset switch supplies the common line with a first voltage between the first and second reference voltages. A comparator compares the first voltage with a second voltage at the common line to generate a determination signal. A conversion control circuit generates the control signal and a multiple-bit digital signal based on the determination signal. A measurement control circuit measures the capacitance of the capacitor corresponding to an upper order bit of the digital signal using lower order capacitors. A correction circuit corrects the digital signal based on the measured capacitance to generate a digital output signal.
申请公布号 US2015256190(A1) 申请公布日期 2015.09.10
申请号 US201514630422 申请日期 2015.02.24
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 TAKAYAMA Takeshi
分类号 H03M1/06;H03M1/66;H03M1/12 主分类号 H03M1/06
代理机构 代理人
主权项 1. An analog-to-digital conversion circuit that converts an analog input signal to a digital output signal, the analog-to-digital conversion circuit comprising: a digital-to-analog converter including a plurality of capacitors, each including a first terminal and a second terminal, wherein the first terminal is coupled to a common signal line, and each of the capacitors has a capacitance that is less than or equal to a sum of the capacitances of one or more lower order capacitors,a plurality of switches respectively coupled to the second terminals of the capacitors, wherein each of the switches is configured to selectively supply, in response to a control signal, one of the analog input signal, a first reference voltage, and a second reference voltage to the second terminal of the corresponding capacitor, anda reset switch that supplies the common signal line with a first voltage that is between the first reference voltage and the second reference voltage; a comparator that compares the first voltage with a second voltage at the common signal line to generate a determination signal; a conversion control circuit that generates the control signal and a multiple-bit digital signal in accordance with the determination signal; a measurement control circuit that generates the control signal in accordance with the determination signal, wherein the measurement control circuit is configured to measure the capacitance of one of the capacitors that corresponds to an upper order bit of the multiple-bit digital signal using one or more lower order capacitors; and a correction circuit that corrects the multiple-bit digital signal based on the capacitance measured by the measurement control circuit to generate the digital output signal.
地址 Yokohama-shi JP