发明名称 回路基板、電子部品収納用パッケージおよび電子装置
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce transmission loss by shortening the length of each of a plurality of lines for signals, and to reduce a difference of the transmission timing of a plurality of signals in the plurality of lines for signals. <P>SOLUTION: A circuit board 12 includes a substrate 121 containing a dielectric material, and a plurality of lines for signals 122a-122d formed on the upper surface of the substrate 121 and having different wiring lengths. The substrate 121 includes cavities 124a and 124d provided directly under the lines 122a and 122d which are long in the plurality of lines 122a-122d in the perspective plane. The cavities 124a and 124d have shapes along the long lines 122a and 122d, respectively. <P>COPYRIGHT: (C)2012,JPO&INPIT</p>
申请公布号 JP5777318(B2) 申请公布日期 2015.09.09
申请号 JP20100239796 申请日期 2010.10.26
申请人 发明人
分类号 H05K1/02;H01L23/12;H01P3/02 主分类号 H05K1/02
代理机构 代理人
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