发明名称 Three dimensional memory structure
摘要 A method to fabricate a three dimensional memory structure includes forming an array stack, creating a layer of sacrificial material above the array stack, etching a hole through the layer of sacrificial material and the array stack, creating a pillar of semiconductor material in the hole to form at least two vertically stacked flash memory cells that use the pillar as a common body, removing at least some of the layer of sacrificial material around the pillar to expose a portion of the pillar, and forming a field effect transistor (FET) using the portion of the pillar as the body of the FET.
申请公布号 US9129859(B2) 申请公布日期 2015.09.08
申请号 US201313786925 申请日期 2013.03.06
申请人 Intel Corporation 发明人 Liu Haitao;Mouli Chandra V.;Parat Krishna K.;Sun Jie;Huang Guangyu
分类号 H01L29/76;H01L27/115;H01L29/66;H01L29/788;H01L29/792 主分类号 H01L29/76
代理机构 Alpine Technology Law Group LLC 代理人 Alpine Technology Law Group LLC
主权项 1. A method to fabricate a three dimensional memory structure comprising: forming an array stack; creating a layer of sacrificial material above the array stack; etching a hole through the layer of sacrificial material and at least a portion of the array stack; creating a pillar of semiconductor material in the hole to form at least two vertically stacked flash memory cells that use said pillar as a common body; removing at least some of the layer of sacrificial material around said pillar to expose at least a portion of said pillar; etching away some of the exposed portion of said pillar; and forming a field effect transistor (FET) using the exposed portion of said pillar as a body of the FET.
地址 Santa Clara CA US