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1. A high-voltage gate driver circuit configured to drive a high-side power switch and a low-side power switch connected in series between an input voltage node and a ground potential, the gate driver circuit including a high-side control circuit formed in a floating tub and being supplied by a boost voltage at a boost node relative to a floating supply voltage at a floating supply voltage node, the gate driver circuit comprising:
an active dv/dt triggered ESD protection circuit coupled between a protected node and a power rail node, the active dv/dt triggered ESD protection circuit including a dv/dt circuit controlling an ESD protection transistor, the dv/dt circuit being connected between the protected node and the power rail node and the ESD protection transistor having a first current handling terminal connected to the protected node, a second current handling terminal connected to the power rail node and a control terminal controlled by the dv/dt circuit, the ESD protection transistor being turned on in response to an ESD event occurring at the protected node to conduct ESD current from the protected node to the power rail node, the dv/dt circuit being charged up after a time constant to disable the ESD protection transistor. |
