| 发明名称 |
Method and apparatus for performing compilation using multiple design flows |
| 摘要 |
A method for designing a system on a target device includes merging a netlist for a first partition of the system generated from a bottom-up design flow with a netlist for a second partition of the system from a top-down design flow to form a combined netlist, and performing fitting on the combined netlist. |
| 申请公布号 |
US9122826(B1) |
申请公布日期 |
2015.09.01 |
| 申请号 |
US201314052210 |
申请日期 |
2013.10.11 |
| 申请人 |
Altera Corporation |
发明人 |
Borer Terry;Leaver Andrew;Karchmer David;Quan Gabriel;Brown Stephen D. |
| 分类号 |
G06F17/50;G01R31/3183 |
主分类号 |
G06F17/50 |
| 代理机构 |
|
代理人 |
Cho L. |
| 主权项 |
1. A method for designing a system on a target device, comprising:
distributing a timing budget for generating a netlist for a first partition; merging the netlist for the first partition of the system generated from a first design flow of a first type with a netlist for a second partition of the system generated from a second design flow of a second type to form a combined netlist; and performing fitting on the combined netlist, wherein the distributing, merging, and performing is implemented by a processor. |
| 地址 |
San Jose CA US |
