发明名称 |
Nonvolatile semiconductor memory device and method of manufacturing the same |
摘要 |
According to one embodiment, a nonvolatile semiconductor memory device comprises a semiconductor substrate, a first layer, a first conductive layer, a second conductive layer, an insulating layer, a block insulating layer formed on an inner surface of a pair of through holes formed in the insulating layer, the second conductive layer, and the first conductive layer, and on an inner surface of a connecting hole formed in the first layer and configured, a charge storage layer formed on the block insulating layer, a tunnel insulating layer formed on the charge storage layer, and a semiconductor pillar formed on the tunnel insulating layer. The semiconductor pillar includes a doped silicide layer which is formed in the insulating layer, a silicon layer formed in the second conductive layer and the first conductive layer, and a silicide layer formed in first layer. |
申请公布号 |
US9123749(B2) |
申请公布日期 |
2015.09.01 |
申请号 |
US201314018836 |
申请日期 |
2013.09.05 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
Kawai Tomoya;Yasuda Naoki |
分类号 |
H01L29/792;H01L29/66;H01L27/115 |
主分类号 |
H01L29/792 |
代理机构 |
Oblon, McClelland, Maier & Neustadt, L.L.P. |
代理人 |
Oblon, McClelland, Maier & Neustadt, L.L.P. |
主权项 |
1. A nonvolatile semiconductor memory device comprising:
a semiconductor substrate; a first layer formed above the semiconductor substrate; a first conductive layer formed above the first layer; a second conductive layer formed above the first conductive layer; an insulating layer formed on the second conductive layer; a block insulating layer formed on an inner surface of a pair of through holes formed in the insulating layer, the second conductive layer, and the first conductive layer, and extending in a stacking direction, and on an inner surface of a connecting hole formed in the first layer and configured to connect lower end portions of the pair of through holes; a charge storage layer formed on the block insulating layer; a tunnel insulating layer formed on the charge storage layer; and a semiconductor pillar formed on the tunnel insulating layer, wherein the semiconductor pillar includes a doped silicide layer which is formed in the pair of through holes formed in the insulating layer, and in which an impurity is doped, a silicon layer formed in the pair of through holes formed in the second conductive layer and the first conductive layer, and a silicide layer formed in the connecting hole formed in the first layer. |
地址 |
Minato-ku JP |