包含不同位元长度场变数之记忆体的定址方法及装置;METHOD AND APPARATUS FOR ADDRESSING A MEMORY CONTAINING DIFFERENT BIT-LENGTH FIELD VARIABLES

摘要

本发明揭露一种存取一期望的记忆体位置之方法，适用于一密码处理装置。该密码处理装置包含复数个暂存器以及一暂存器储存装置。该方法包含：读取一密码指令，该密码指令包含一运算码栏位以及一运算元说明符栏位；根据该暂存器id次栏位，从该些暂存器之一读取一基本位址；从该暂存器储存装置以及该索引次栏位，分别读取一位元长度以及一索引值；根据该基本位址、该位元长度以及该索引值，决定该期望的记忆体位置；以及，存取该期望的记忆体位置以得到一期望的场变数。其中该运算元说明符栏位包含一暂存器id次栏位以及一索引次栏位。; reading a base address from one of the plurality of registers according to a register-id sub-field; respectively reading a bit length and an index value from the register storage and an index sub-field; determining the desired memory location according to the base address, the bit length and the index value; and, accessing the desired memory location to obtain a desired field variable. Here, the operand specifier field comprises the register-id sub-field and the index sub-field.