| 发明名称 |
Apparatus and Method for Determining the Number of Execution Units to Keep Active in a Processor |
| 摘要 |
A processor is described that includes a plurality of execution units in a processor core. The processor also may include power management circuitry to determine a configuration with a lowest power cost from a plurality of configurations that each have a different number of enabled execution units for a same active performance state. A method may include determining with power management circuitry of a processor a configuration with a lowest power cost from a plurality of configurations that each have a different number of enabled execution units in a processor core of the processor for a same active performance state. |
| 申请公布号 |
US2015241954(A1) |
申请公布日期 |
2015.08.27 |
| 申请号 |
US201514697553 |
申请日期 |
2015.04.27 |
| 申请人 |
Ananthakrishnan Avinash N.;Sebot Julien;Schwartz Jay D.;Gunther Stephen H.;Samson Eric C. |
发明人 |
Ananthakrishnan Avinash N.;Sebot Julien;Schwartz Jay D.;Gunther Stephen H.;Samson Eric C. |
| 分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
| 代理机构 |
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代理人 |
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| 主权项 |
1. A processor comprising:
a plurality of execution units in a processor core; and power management circuitry to determine a configuration with a lowest power cost from a plurality of configurations that each have a different number of enabled execution units for a same active performance state. |
| 地址 |
Portland OR US |
