BIAS CIRCUITS AND METHODS FOR STACKED DEVICES

摘要

Embodiments of the present disclosure include a bias circuit for generating bias voltages to stacked transistors. In one embodiment, stacked transistors are coupled between an input transistor and an output node. A modulated power supply voltage and an input signal produce a voltage at the output node. The modulated power supply voltage is provided as an input to the bias circuit. Bias voltages are generated that change with the power supply voltage. In one embodiment, particular transistors in the stack are biased so that their control terminals are effectively short circuited when the power supply voltage is reduced.

主权项

1. An electronic device comprising:
a first transistor having a control terminal configured to receive an input signal, a first terminal, and a second terminal; a plurality of stacked transistors, the plurality of stacked transistors arranged in series between the second terminal of the first transistor and an output node, each of the plurality of stacked transistors comprising a control terminal; an inductor having a first terminal coupled to the output node and a second terminal coupled to a modulated power supply, the modulated power supply producing a time varying power supply voltage; a bias circuit having an input coupled to the modulated power supply to receive the time varying power supply voltage, the bias circuit comprising a plurality of outputs producing a plurality of bias voltages, wherein particular outputs of the bias circuit are coupled to particular control terminals of the plurality of stacked transistors, wherein the power supply voltage is greater than each of the plurality of bias voltages above a first power supply voltage level, and the power supply voltage is less than each of the plurality of bias voltages below a second power supply voltage level.