发明名称 マルチスレッドプロセッサ
摘要 <p>PROBLEM TO BE SOLVED: To provide a multi-thread processor capable of flexibly setting an execution time of a hardware thread while granting a minimum execution time of the hardware thread.SOLUTION: A multi-thread processor comprises: a plurality of hardware threads; a first thread scheduler 19 for designating a hardware thread in accordance with a priority; and an arithmetic circuit 10 for executing an instruction generated by the designated hardware thread. Each time a hardware thread of a high priority is preferentially selected and an instruction generated by the selected hardware thread is executed in the arithmetic circuit, the first thread scheduler 19 updates the priority for the hardware thread which generates the executed instruction, and selects at least one other hardware thread until the priority of the hardware having the highest priority becomes the lowest priority.</p>
申请公布号 JP5770334(B2) 申请公布日期 2015.08.26
申请号 JP20140090606 申请日期 2014.04.24
申请人 发明人
分类号 G06F9/48;G06F9/46 主分类号 G06F9/48
代理机构 代理人
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