| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacturing method of the same, which can achieve cost reduction in a manufacturing process and minimize a cell size. <P>SOLUTION: A MOSFET 11 of the present invention comprises: a low concentration n-type drain region 13 formed on an n-type SiC semiconductor substrate 12; a p-type channel region 14 formed on the drain region 13; a high concentration n-type source region 15 formed in the channel region 14; a trench 17 reaching the drain region 13, which is formed on a principal surface 16 on the source region 15 side; and a gate electrode 19 formed in the trench 17 via an insulation film 18. The source region 15 is formed on a side wall surface so as to extend in a depth direction from the principal surface 16 to a predetermined depth of the trench 17. The gate electrode 19 is formed such that a top face of the gate electrode 19 is located above a bottom edge of the source region 15 and below the principal surface 16. <P>COPYRIGHT: (C)2013,JPO&INPIT</p> |
