| 摘要 |
Data processing apparatus 2 comprises bounded pointer storage register 60 storing pointer 62 and associated range information 64. Processing circuitry 4 identifies register 60 and performs predetermined operations for a target range of addresses based on range information 64 in response to a first type of instructions specifying pointer register 60. For example, clean and invalidate operations walk through each entry of caches 20, 24, 36, 52 comparing corresponding tags against the range of addresses 64 and performing cache maintenance if the tags lie within the range. Other examples comprise setting, copying, and searching instructions operating upon the target range of addresses. Second types of instructions use the range to protect against unauthorized access, e.g. in capability-based addressing. They trigger errors if pointer 62 is set or offset outside the allowable range. Restriction information 66 is also used to define capabilities within which pointer 62 can be used. |
