发明名称 |
Space and cost efficient incorporation of specialized input-output pins on integrated circuit substrates |
摘要 |
In some embodiments an Integrated Circuit package includes a plurality of system functional pins, at least one system functional pin depopulation zone, and at least one non-system functional pin located in the at least one functional pin depopulation zone. Other embodiments are described and claimed. |
申请公布号 |
US9111927(B2) |
申请公布日期 |
2015.08.18 |
申请号 |
US201213493129 |
申请日期 |
2012.06.11 |
申请人 |
Intel Corporation |
发明人 |
Trobough Mark B.;Baldwin Christopher S. |
分类号 |
H01L23/48;H01L23/498;G01R1/04 |
主分类号 |
H01L23/48 |
代理机构 |
International IP Law Group, P.L.L.C. |
代理人 |
International IP Law Group, P.L.L.C. |
主权项 |
1. A Central Processing Unit (CPU), comprising:
a plurality of system functional pins; at least one system functional pin depopulation zone; and at least one non-system functional pin located in the at least one functional pin depopulation zone, wherein the at least one non-system functional pin sends test signals, and wherein a stacked-socket interposer probe head assembly is to receive a signal from the at least one non-system functional pin, and pass a system functional signals from an Integrated Circuit package to a socket. |
地址 |
Santa Clara CA US |