发明名称 不揮発性半導体記憶装置
摘要 <p>A non-volatile semiconductor memory device includes a memory cell array including a first wire, a second wire crossing the first wire, and a memory cell connected to both the wires at a crossing portion of the first wire and the second wire, the memory cell including a variable resistance element storing data in a non-volatile manner by a resistance value, and a control circuit setting the variable resistance element in first or second resistance state by application of first or second voltage to the memory cell and reading data from the memory cell by application of third voltage to the memory cell. The control circuit applies to the memory cell at predetermined timing weak write voltage causing the variable resistance element to be held in the first resistance state and the second resistance state.</p>
申请公布号 JP5763004(B2) 申请公布日期 2015.08.12
申请号 JP20120068926 申请日期 2012.03.26
申请人 发明人
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
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