发明名称 系統連系用電力変換装置の制御装置、及び系統連系用電力変換装置
摘要 <p>A phase computing unit (22) for calculating a current phase (thetaalphabeta) used for setting the current value of an output current is provided with a phase retention unit (44). The phase retention unit (44) updates and retains m cycles (e.g., 1 cycle) of normal phase information extracted before an anomaly caused by a drop in a grid voltage is determined to have occurred. When the output current value is to be set, the phase information of each extraction of the output from the phase computing unit (42) is outputted in a case where an anomaly caused by a drop in voltage has not occurred in the operation of a phase value switching unit (43) and a voltage drop determination unit (47). When an anomaly is caused by a drop in voltage, the phase information retained by the phase retention unit (44) is outputted.</p>
申请公布号 JP5760930(B2) 申请公布日期 2015.08.12
申请号 JP20110223190 申请日期 2011.10.07
申请人 日新電機株式会社 发明人 西村 荘治;羽田 儀宏;黒田 和宏;小林 成彰
分类号 H02M7/48 主分类号 H02M7/48
代理机构 代理人
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