Method of fabricating a MOS device using a stress-generating material

摘要

Provided is a method of fabricating a MOS device including the following steps. A gate structure is formed on a substrate and a first spacer is formed at a sidewall of the gate structure. A first implant process is performed to form source and drain extension regions in the substrate. A spacer material layer is formed on the gate structure, the first spacer and the substrate. A treatment process is performed so that stress from the spacer material layer is applied onto and memorized in a channel between two source and drain extension regions. An anisotropic process is performed to remove a portion of the spacer material so that a second spacer is formed. A second implant process is performed to form source and drain regions in the substrate.

主权项

1. A method of fabricating a MOS device, comprising:
providing a substrate comprising a first region and a second region; forming a first gate structure and a second gate structure respectively on the substrate in the first and second regions; forming a first spacer at a sidewall of each of the first and second gate structures; performing a first implant process to form first source and drain extension regions of a first conductivity type in the substrate in the first region, wherein a first channel is defined by two adjacent first source and drain extension regions; performing a second implant process to form second source and drain extension regions of a second conductivity type in the substrate in the second region, wherein a second channel is defined by two adjacent second source and drain extension regions; forming a spacer material layer to cover the first and second gate structures, the first spacer and the substrate; performing an anisotropic process to remove a portion of the spacer material layer so that a second spacer is formed at a sidewall of the first spacer; after the step of forming the spacer material layer and before the step of performing the anisotropic process, performing a treatment process so that stress from the spacer material layer is applied onto and memorized in the first channel; performing a third implant process to form first source and drain regions of the first conductivity type in the substrate beside the first gate structure in the first region; and performing a fourth implant process to form second source and drain regions of the second conductivity type in the substrate beside the second gate structure in the second region, wherein the first conductivity type is N-type and the second conductivity type is P-type, and wherein the method further comprises forming a stress-generating material on the substrate in the second region after the step of performing the first implant process and before the step of performing the second implant process.