发明名称 Methods and apparatus for aligning signals in transceiver circuitry
摘要 Transceiver circuitry may include a storage element that receives data signals from an external element, an alignment detector circuit, and a register. The storage element has a write clock terminal that receives a channel clock signal and a read clock terminal that receives another channel clock signal. The alignment detector circuit is adapted to generate an asserted ready signal when a predefined pattern is detected in the received data signals. The register receives an output signal from the storage element and outputs the output signal based on the asserted ready signal that is generated by the alignment detector circuit. The register may be clocked by the same channel clock signal that is received at the read clock terminal of the storage element.
申请公布号 US9106504(B1) 申请公布日期 2015.08.11
申请号 US201314055063 申请日期 2013.10.16
申请人 Altera Corporation 发明人 Lee Chiang Wei;Leong Han Hua;Loke Keen Yew;Lam Siew Leong
分类号 H04L5/16;H04L25/40 主分类号 H04L5/16
代理机构 代理人
主权项 1. Transceiver circuitry that receives data signals, comprising: a storage element having a write clock terminal that receives a first channel clock signal and having a read clock terminal that receives a second channel clock signal, wherein the storage element further receives the data signals; an alignment detector circuit that generates an asserted ready signal in response to detecting a predefined pattern in the data signals; and a register that receives an output signal from the storage element, wherein the register has a clock terminal that receives the second channel clock signal and wherein the register outputs the output signal based at least in part on the asserted ready signal.
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