发明名称 Thermo/electrical conductor arrangement for multilayer printed circuit boards
摘要 The present invention relates to a thermo/electrical conductor arrangement for multilayer printed circuit boards (PCBs). Using vias for the transport of heat from the interior of the PCB and for conducting high currents between the conducting layers have limitations. Via platings are very thin and vias filled with solder is an unreliable method as there is always a risk that the vias are not properly filled during the soldering process. The present invention overcomes this by inserting a pin of a current conductive material (such as copper) into the via so that the pin is brought into galvanic contact with the conducting layers in the PCB and where at least one end of the pin is freely protruding from the PCB thereby allowing the pin to conduct heat from the interior of the PCB to the protruding end of the pin for external cooling.
申请公布号 US9107296(B2) 申请公布日期 2015.08.11
申请号 US201114122661 申请日期 2011.06.01
申请人 Telefonaktiebolaget L M Ericsson (publ) 发明人 Perez-Uria Igor;Ferm Per
分类号 H05K1/02;H01F5/00;H05K3/40 主分类号 H05K1/02
代理机构 Nicholson de Vos Webster & Elliott, LLP 代理人 Nicholson de Vos Webster & Elliott, LLP
主权项 1. A multilayer printed circuit board (PCB) comprising: at least one via penetrating a plurality of conductive layers in the PCB; at least one pin of a current conductive material, wherein the at least one pin is inserted into the at least one via so that the at least one pin is brought into galvanic contact with conducting layers, and wherein at least one end of the at least one pin is freely protruding from the PCB thereby allowing the at least one pin to conduct heat from an interior of the PCB to the protruding end, and wherein the freely protruding end of the pin is provided with a cooling fin that extends in parallel with a surface of the PCB.
地址 Stockholm SE