发明名称 ALL DIGITAL BURST-MODE CLOCK AND DATA RECOVERY (CDR)
摘要 The present invention relates to a clock and data recovery (CDR) unit comprising of a bang-bang phase detector to receive data and a recovered clock from a phase selector multiplexer. The phase detector produces a late and an early comparison output. A block (digital filter) receives the late and early input and produces a multiplexer selector control signal. The phase selector multiplexer selects a clock phase as the recovered clock signal using multiplexer selector control signal.
申请公布号 US2015222420(A1) 申请公布日期 2015.08.06
申请号 US201514686637 申请日期 2015.04.14
申请人 Exar Corporation 发明人 CIRIT Sadettin;SALCEDO Jose Antonio
分类号 H04L7/04 主分类号 H04L7/04
代理机构 代理人
主权项 1. A clock and data recovery (CDR) unit comprising: a bang-bang phase detector to receive data and to receive a recovered clock from a phase selector multiplexer and to produce a late and an early comparison output; a block to receive the late and early comparison outputs and produce a Grey code output; the phase selector multiplexer to select a clock phase as the recovered clock signal using the Grey code output.
地址 Fremont CA US