DISTRIBUTED ON-CHIP DECOUPLING APPARATUS AND METHOD USING PACKAGE INTERCONNECT

摘要

An integrated circuit device is disclosed. The integrated circuit device includes a semiconductor die fabricated by a front-end semiconductor process and having oppositely disposed planar surfaces. The semiconductor die is formed with semiconductor devices, power supply circuitry coupled to the semiconductor devices, decoupling capacitance circuitry, and through-vias. The through-vias include a first group of vias coupled to the power supply circuitry and a second group of vias coupled to the decoupling capacitance circuitry. Conductors are formed in a first metal layer disposed on the semiconductor die in accordance with a back-end semiconductor process. The conductors are configured to couple to the first and second groups of through-vias to establish conductive paths from the power supply circuitry to the decoupling capacitance circuitry.

主权项

1. An integrated circuit device comprising:
a semiconductor die fabricated by a front-end semiconductor process and having oppositely disposed planar surfaces, the semiconductor die formed with
semiconductor devices,power supply circuitry coupled to the semiconductor devices,decoupling capacitance circuitry, andthrough-vias including a first group of vias coupled to the power supply circuitry and a second group of vias coupled to the decoupling capacitance circuitry; and conductors formed in a first metal layer disposed on the semiconductor die, the first metal layer fabricated by a back-end semiconductor process, the conductors configured to couple to the first and second groups of vias to establish conductive paths from the power supply circuitry to the decoupling capacitance circuitry.